
convert2:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004004c0 <_init>:
  4004c0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4004c4:	910003fd 	mov	x29, sp
  4004c8:	94000034 	bl	400598 <call_weak_fn>
  4004cc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4004d0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004e0 <.plt>:
  4004e0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004e4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf740>
  4004e8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ec:	913fe210 	add	x16, x16, #0xff8
  4004f0:	d61f0220 	br	x17
  4004f4:	d503201f 	nop
  4004f8:	d503201f 	nop
  4004fc:	d503201f 	nop

0000000000400500 <strlen@plt>:
  400500:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400504:	f9400211 	ldr	x17, [x16]
  400508:	91000210 	add	x16, x16, #0x0
  40050c:	d61f0220 	br	x17

0000000000400510 <__libc_start_main@plt>:
  400510:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400514:	f9400611 	ldr	x17, [x16, #8]
  400518:	91002210 	add	x16, x16, #0x8
  40051c:	d61f0220 	br	x17

0000000000400520 <__gmon_start__@plt>:
  400520:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400524:	f9400a11 	ldr	x17, [x16, #16]
  400528:	91004210 	add	x16, x16, #0x10
  40052c:	d61f0220 	br	x17

0000000000400530 <abort@plt>:
  400530:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400534:	f9400e11 	ldr	x17, [x16, #24]
  400538:	91006210 	add	x16, x16, #0x18
  40053c:	d61f0220 	br	x17

0000000000400540 <printf@plt>:
  400540:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400544:	f9401211 	ldr	x17, [x16, #32]
  400548:	91008210 	add	x16, x16, #0x20
  40054c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400550 <_start>:
  400550:	d280001d 	mov	x29, #0x0                   	// #0
  400554:	d280001e 	mov	x30, #0x0                   	// #0
  400558:	aa0003e5 	mov	x5, x0
  40055c:	f94003e1 	ldr	x1, [sp]
  400560:	910023e2 	add	x2, sp, #0x8
  400564:	910003e6 	mov	x6, sp
  400568:	580000c0 	ldr	x0, 400580 <_start+0x30>
  40056c:	580000e3 	ldr	x3, 400588 <_start+0x38>
  400570:	58000104 	ldr	x4, 400590 <_start+0x40>
  400574:	97ffffe7 	bl	400510 <__libc_start_main@plt>
  400578:	97ffffee 	bl	400530 <abort@plt>
  40057c:	00000000 	.inst	0x00000000 ; undefined
  400580:	0040077c 	.word	0x0040077c
  400584:	00000000 	.word	0x00000000
  400588:	004007a0 	.word	0x004007a0
  40058c:	00000000 	.word	0x00000000
  400590:	00400820 	.word	0x00400820
  400594:	00000000 	.word	0x00000000

0000000000400598 <call_weak_fn>:
  400598:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf740>
  40059c:	f947f000 	ldr	x0, [x0, #4064]
  4005a0:	b4000040 	cbz	x0, 4005a8 <call_weak_fn+0x10>
  4005a4:	17ffffdf 	b	400520 <__gmon_start__@plt>
  4005a8:	d65f03c0 	ret
  4005ac:	00000000 	.inst	0x00000000 ; undefined

00000000004005b0 <deregister_tm_clones>:
  4005b0:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  4005b4:	9101a000 	add	x0, x0, #0x68
  4005b8:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  4005bc:	9101a021 	add	x1, x1, #0x68
  4005c0:	eb00003f 	cmp	x1, x0
  4005c4:	540000a0 	b.eq	4005d8 <deregister_tm_clones+0x28>  // b.none
  4005c8:	90000001 	adrp	x1, 400000 <_init-0x4c0>
  4005cc:	f9442021 	ldr	x1, [x1, #2112]
  4005d0:	b4000041 	cbz	x1, 4005d8 <deregister_tm_clones+0x28>
  4005d4:	d61f0020 	br	x1
  4005d8:	d65f03c0 	ret
  4005dc:	d503201f 	nop

00000000004005e0 <register_tm_clones>:
  4005e0:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  4005e4:	9101a000 	add	x0, x0, #0x68
  4005e8:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  4005ec:	9101a021 	add	x1, x1, #0x68
  4005f0:	cb000021 	sub	x1, x1, x0
  4005f4:	9343fc21 	asr	x1, x1, #3
  4005f8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005fc:	9341fc21 	asr	x1, x1, #1
  400600:	b40000a1 	cbz	x1, 400614 <register_tm_clones+0x34>
  400604:	90000002 	adrp	x2, 400000 <_init-0x4c0>
  400608:	f9442442 	ldr	x2, [x2, #2120]
  40060c:	b4000042 	cbz	x2, 400614 <register_tm_clones+0x34>
  400610:	d61f0040 	br	x2
  400614:	d65f03c0 	ret

0000000000400618 <__do_global_dtors_aux>:
  400618:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40061c:	910003fd 	mov	x29, sp
  400620:	f9000bf3 	str	x19, [sp, #16]
  400624:	b0000093 	adrp	x19, 411000 <strlen@GLIBC_2.17>
  400628:	39419260 	ldrb	w0, [x19, #100]
  40062c:	35000080 	cbnz	w0, 40063c <__do_global_dtors_aux+0x24>
  400630:	97ffffe0 	bl	4005b0 <deregister_tm_clones>
  400634:	52800020 	mov	w0, #0x1                   	// #1
  400638:	39019260 	strb	w0, [x19, #100]
  40063c:	f9400bf3 	ldr	x19, [sp, #16]
  400640:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400644:	d65f03c0 	ret

0000000000400648 <frame_dummy>:
  400648:	17ffffe6 	b	4005e0 <register_tm_clones>

000000000040064c <test>:
  40064c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400650:	910003fd 	mov	x29, sp
  400654:	f9000fa0 	str	x0, [x29, #24]
  400658:	f9400fa0 	ldr	x0, [x29, #24]
  40065c:	52800c21 	mov	w1, #0x61                  	// #97
  400660:	39000001 	strb	w1, [x0]
  400664:	f9400fa0 	ldr	x0, [x29, #24]
  400668:	90000001 	adrp	x1, 400000 <_init-0x4c0>
  40066c:	91214021 	add	x1, x1, #0x850
  400670:	f9000401 	str	x1, [x0, #8]
  400674:	f9400fa0 	ldr	x0, [x29, #24]
  400678:	f9400400 	ldr	x0, [x0, #8]
  40067c:	f90017a0 	str	x0, [x29, #40]
  400680:	f9400fa0 	ldr	x0, [x29, #24]
  400684:	f9400400 	ldr	x0, [x0, #8]
  400688:	f90013a0 	str	x0, [x29, #32]
  40068c:	f94017a0 	ldr	x0, [x29, #40]
  400690:	39400000 	ldrb	w0, [x0]
  400694:	2a0003e6 	mov	w6, w0
  400698:	f94017a0 	ldr	x0, [x29, #40]
  40069c:	b9400401 	ldr	w1, [x0, #4]
  4006a0:	f94017a0 	ldr	x0, [x29, #40]
  4006a4:	b9400802 	ldr	w2, [x0, #8]
  4006a8:	f94017a0 	ldr	x0, [x29, #40]
  4006ac:	39404000 	ldrb	w0, [x0, #16]
  4006b0:	2a0003e3 	mov	w3, w0
  4006b4:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4006b8:	9121a000 	add	x0, x0, #0x868
  4006bc:	f94013a5 	ldr	x5, [x29, #32]
  4006c0:	2a0303e4 	mov	w4, w3
  4006c4:	2a0203e3 	mov	w3, w2
  4006c8:	2a0103e2 	mov	w2, w1
  4006cc:	2a0603e1 	mov	w1, w6
  4006d0:	97ffff9c 	bl	400540 <printf@plt>
  4006d4:	52800000 	mov	w0, #0x0                   	// #0
  4006d8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4006dc:	d65f03c0 	ret

00000000004006e0 <T>:
  4006e0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4006e4:	910003fd 	mov	x29, sp
  4006e8:	f9000bf3 	str	x19, [sp, #16]
  4006ec:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  4006f0:	91012000 	add	x0, x0, #0x48
  4006f4:	f9400400 	ldr	x0, [x0, #8]
  4006f8:	f9001fa0 	str	x0, [x29, #56]
  4006fc:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400700:	91220000 	add	x0, x0, #0x880
  400704:	f9001ba0 	str	x0, [x29, #48]
  400708:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  40070c:	9122e001 	add	x1, x0, #0x8b8
  400710:	910083a0 	add	x0, x29, #0x20
  400714:	b9400022 	ldr	w2, [x1]
  400718:	b9000002 	str	w2, [x0]
  40071c:	b8402021 	ldur	w1, [x1, #2]
  400720:	b8002001 	stur	w1, [x0, #2]
  400724:	52800200 	mov	w0, #0x10                  	// #16
  400728:	b9002fa0 	str	w0, [x29, #44]
  40072c:	f9401ba0 	ldr	x0, [x29, #48]
  400730:	97ffff74 	bl	400500 <strlen@plt>
  400734:	aa0003f3 	mov	x19, x0
  400738:	910083a0 	add	x0, x29, #0x20
  40073c:	97ffff71 	bl	400500 <strlen@plt>
  400740:	aa0003e1 	mov	x1, x0
  400744:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400748:	91222000 	add	x0, x0, #0x888
  40074c:	aa0103e6 	mov	x6, x1
  400750:	d28000c5 	mov	x5, #0x6                   	// #6
  400754:	aa1303e4 	mov	x4, x19
  400758:	d2800103 	mov	x3, #0x8                   	// #8
  40075c:	d2800102 	mov	x2, #0x8                   	// #8
  400760:	b9402fa1 	ldr	w1, [x29, #44]
  400764:	97ffff77 	bl	400540 <printf@plt>
  400768:	f9401fa0 	ldr	x0, [x29, #56]
  40076c:	f9400400 	ldr	x0, [x0, #8]
  400770:	f9400bf3 	ldr	x19, [sp, #16]
  400774:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400778:	d65f03c0 	ret

000000000040077c <main>:
  40077c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400780:	910003fd 	mov	x29, sp
  400784:	9100c3a0 	add	x0, x29, #0x30
  400788:	97ffffb1 	bl	40064c <test>
  40078c:	97ffffd5 	bl	4006e0 <T>
  400790:	52800000 	mov	w0, #0x0                   	// #0
  400794:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400798:	d65f03c0 	ret
  40079c:	00000000 	.inst	0x00000000 ; undefined

00000000004007a0 <__libc_csu_init>:
  4007a0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4007a4:	910003fd 	mov	x29, sp
  4007a8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4007ac:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf740>
  4007b0:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf740>
  4007b4:	91374294 	add	x20, x20, #0xdd0
  4007b8:	913722b5 	add	x21, x21, #0xdc8
  4007bc:	a902dff6 	stp	x22, x23, [sp, #40]
  4007c0:	cb150294 	sub	x20, x20, x21
  4007c4:	f9001ff8 	str	x24, [sp, #56]
  4007c8:	2a0003f6 	mov	w22, w0
  4007cc:	aa0103f7 	mov	x23, x1
  4007d0:	9343fe94 	asr	x20, x20, #3
  4007d4:	aa0203f8 	mov	x24, x2
  4007d8:	97ffff3a 	bl	4004c0 <_init>
  4007dc:	b4000194 	cbz	x20, 40080c <__libc_csu_init+0x6c>
  4007e0:	f9000bb3 	str	x19, [x29, #16]
  4007e4:	d2800013 	mov	x19, #0x0                   	// #0
  4007e8:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4007ec:	aa1803e2 	mov	x2, x24
  4007f0:	aa1703e1 	mov	x1, x23
  4007f4:	2a1603e0 	mov	w0, w22
  4007f8:	91000673 	add	x19, x19, #0x1
  4007fc:	d63f0060 	blr	x3
  400800:	eb13029f 	cmp	x20, x19
  400804:	54ffff21 	b.ne	4007e8 <__libc_csu_init+0x48>  // b.any
  400808:	f9400bb3 	ldr	x19, [x29, #16]
  40080c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400810:	a942dff6 	ldp	x22, x23, [sp, #40]
  400814:	f9401ff8 	ldr	x24, [sp, #56]
  400818:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40081c:	d65f03c0 	ret

0000000000400820 <__libc_csu_fini>:
  400820:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400824 <_fini>:
  400824:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400828:	910003fd 	mov	x29, sp
  40082c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400830:	d65f03c0 	ret
